000 00402nam a2200157Ia 4500
008 240618s9999||||xx |||||||||||||| ||und||
020 _aKBCS
_c34.5
040 _aMAIN
082 _a383
100 _aKATEVENIS,MANOLIS G.H
_937489
245 0 _aREDUCED INSTRUCTION SET COMPUTER ARCHITECTURES FOR VLSI:PH.D THESIS
250 _a1
260 _bMP
_c1986
_aMASSACHUSETTS
300 _b215
942 _cBK
999 _c44350
_d44350